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Design of A Two-Bit Positive Clock-Edge Triggered Counter Utilizing Threshold Logic Unit Based on Perceptron Learning Algorithm

Authors

Ratnadip Dey1, Debdut Biswas1 and Pijush Dutta2, 1Institute of Engineering & Management, India and 2National Institute of Technical Teachers Training & Research, India

Abstract

A Threshold Logic Unit (TLU) is a mathematical function conceived as a crude model, or abstraction of biological neurons. Threshold logic units are the constitutive units in an artificial neural network. In this paper a positive clock-edge triggered T flip-flop is designed using Perceptron Learning Algorithm, which is a basic design algorithm of threshold logic units. Then this T flip-flop is used to design a two-bit up-counter that goes through the states 0, 1, 2, 3, 0, 1... Ultimately, the goal is to show how to design simple logic units based on threshold logic based perceptron concepts.

Keywords

Threshold Logic, Perceptron, VHDL, Flip-flop, Counter

Full Text  Volume 3, Number 2