Subhanshi Agarwal and Manoj Sharma, Bharati Vidyapeeth's College of Engineering, India

Market demands have compelled the VLSI industry stake holders to integrate more and more number of functionalities and which is also being well supported by the advances in fabrication techniques. This has challenged the circuit designers to design the power ware circuits and in the process many experts are using concept from other engineering areas to resolve the power equations more optimally. Adiabatic Logic is one such technique used to reduce the power dissipation of the circuit utilizing the principle from thermo dynamic of zero entropy exchange with environment. Authors have used adiabatic principle and implemented full adder circuit with ECRL and PFAL techniques. Transistor count for carry and sum are 14, 22 and 16, 24 respectively for ECRL and PFAL. The maximum frequency, maximum load driving capability are analyzed for 1.25 micron and 0.18 micron technology. It is found that for 1.25 micron technology ECRL based carry circuit dissipates least power of 2.860176 μ W at 25 MHz, max power of 18.17460 μ W at 100 MHz and maximum Cload derived is 7 fF with 8.464489 μ W at 50 MHz. The PFAL based carry circuit dissipates least power of 38.52858 μ W at 20 MHz, max power of 51.52832 μ W at 100MHz and maximum Cload derived is 20 fF with 40.61746 μ W at 50 MHz. ECRL based sum circuit dissipates least power of 4.932597 μ W at 25 MHz, max power of 53.1588 μ W at 100 MHz and maximum Cload derived is 30 fF with 29.6655 μ W at 50 MHz. The PFAL based sum circuit dissipates least power of 7.052026 μ W at 25 MHz, max power of 53.33038 μ W at 100 MHz and maximum Cload derived is 20 fF with 24.11132 μ W at 50 MHz. For 0.180 micron technology – ECRL based carry circuit dissipates 59.2158 μ W at fmax of 200MHz and maximum Cload derived is 20 fF with 88.63479 μ W at 200MHz. PFAL based carry circuit dissipates 583.6617 μ W at 20 MHz. ECRL based sum circuit dissipates 24.37457 μ W at fmax of 200 MHz and maximum Cload derived is 10 fF with 38.95504 μ W at 200MHz. PFAL based sum circuit dissipates 1555.033 μ W at 20 MHz.

ECRL, PFAL, Full Adder, Adiabatic circuit