Nouma Izeboudjen, Dalila Lazib, Mohammed Bakiri, Feroudja Abid, Sabrina Titri and Fatiha Louiz, CDTA, Algeria

The aim of this paper is to present a new System on Chip (SoC) reconfigurable gateway architecture for Voice over InternetTelephony (VOIP). Our motivation behind this work is justified by the following arguments: most of VOIP solutions proposed in the market are based on the use of a general purpose processor and a DSP circuit. In these solutions, the use of the serial multiply accumulate circuit is very limiting for the signal processing. Also, in embedded VOIP based DSP applications, the DSP works without MMU (memory management unit). This is a serious limitation because VOIP solutions are multi-task based. In order to overcome these problems, we propose a new VOIP gateway architecture built around the OpenRisc-1200-V3 processor. This last one integrates a DSP circuit as well as a MMU. The hardware architecture is mapped into the VIRTEX-5 FPGA device. We propose a design methodology based on the design for reuse and design with reuse concepts. We demonstrate that the proposed SoC architecture is reconfigurable, scalable and the final RTL code can be reused for any FPGA or ASIC technology. Performances measures, in the VIRTEX-5 FPGA device family, show that the SOC-gateway architecture occupies 52% of the FPGA in term of slice LUT, 42% of IOBs, 60% of bloc memory, 8% of integrated DSP, 16% of PLL and the total power is estimated at 4.3Watts.

Voice Over IP, Systems on Chip, FPGA, OpenRisc, Design reuse